1. Introduction. - 1. 1 Cross-talk in DSM IC Design. - 1. 2 Book Overview. - 1. 3 Book Outline. - 2. Validating Deep Sub-Micron Effects. - 2. 1 Chapter Overview. - 2. 2 Trends in DSM VLSI Interconnect. - 2. 3 Predicting VLSI Process Technology Trends. - 2. 4 Extracting On-chip Layout Parasitics. - 2. 5 Validating Cross-talk Effects. - 2. 6 Review of Existing Techniques. - 2. 7 Chapter Summary. - 3. VLSI Layout Fabrics. - 3. 1 Chapter Overview. - 3. 2 Our Dense Wiring Fabric (DWF). - 3. 3 Advantages. - 3. 4 Disadvantages. - 3. 5 Chapter Summary. - 4. Fabric1 - Fabric Cell Based Design. - 4. 1 Chapter Overview. - 4. 2 Design Flow 1. - 4. 3 Design Flow 2. - 4. 4 Chapter Summary. - 5. Fabric3 - Network of PLA Based Design. - 5. 1 Chapter Overview. - 5. 2 Programmable Logic Arrays. - 5. 3 Networks of Programmable Logic Arrays. - 5. 4 Synthesis Algorithms for the Network of PLAs Methodology. - 5. 5 Design Flow 1. - 5. 6 Design Flow 2. - 5. 7 Discussion. - 5. 8 Chapter Summary. - 6. Wire Removal in a Network of PLAS. - 6. 1 Chapter Overview. - 6. 2 Binary SPFDs. - 6. 3 MV-SPFDs. - 6. 4 Experimental Results. - 6. 5 Chapter Summary. - 7. Conclusions and Future Directions. - 7. 1 Conclusions. - 7. 2 Future Work. - Appendices. - Standard Cells. Language: English